IEC TS 62607-6-16:2022

Nanomanufacturing - Key control characteristics - Part 6-16: Two-dimensional materials - Carrier concentration: Field effect transistor method

IEC TS 62607:2022 establishes a standardized method to determine the key control characteristic
carrier concentration  for semiconducting two-dimensional materials by the
field effect transistor (FET) method.  For semiconducting two-dimensional materials, the carrier concentration is evaluated using a field effect transistor (FET) test by a measurement of the voltage shift obtained from transfer curve upon doping process. The FET test structure consists of three terminals of source, drain, and gate where voltage is applied to induce the transistor action. Transfer curves are obtained by measuring drain current while applying varied gate voltage and constant drain voltage with respect to the source which is grounded.

General Information

• Status: Published
• Publication Date: 16-Nov-2022
• ICS: 07.030 - Physics. Chemistry
• ICS: 07.120 - Nanotechnologies
• Technical Committee: TC 113 - Nanotechnology for electrotechnical products and systems
• Drafting Committee: WG 8 - TC 113/WG 8
• Current Stage: PPUB - Publication issued
• Start Date: 21-Dec-2022
• Completion Date: 17-Nov-2022

Standards Content (Sample)

IEC TS 62607-6-16
®

Edition 1.0 2022-11
TECHNICAL
SPECIFICATION

colour
inside


Nanomanufacturing – Key control characteristics –
Part 6-16: Two-dimensional materials – Carrier concentration: Field effect
transistor method
IEC TS 62607-6-16:2022-11(en)

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IEC TS 62607-6-16

®


Edition 1.0 2022-11




TECHNICAL



SPECIFICATION








colour

inside










Nanomanufacturing – Key control characteristics –

Part 6-16: Two-dimensional materials – Carrier concentration: Field effect

transistor method

























INTERNATIONAL

ELECTROTECHNICAL


COMMISSION





ICS 07.030; 07.120 ISBN 978-2-8322-6054-8



  Warning! Make sure that you obtained this publication from an authorized distributor.


® Registered trademark of the International Electrotechnical Commission

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– 2 – IEC TS 62607-6-16:2022  IEC 2022
CONTENTS
FOREWORD . 4
INTRODUCTION . 6
1 Scope . 7
2 Normative references . 7
3 Terms and definitions . 7
3.1 General terms . 8
3.2 Key control characteristics measured in accordance with this document . 8
3.3 Terms related to the measurement method . 9
4 General . 9
4.1 Measurement principle . 9
4.2 Sample preparation method . 9
4.2.1 Sample preparation . 9
4.2.2 Fabrication of FET . 9
4.3 Description of measurement equipment . 10
4.4 Ambient conditions during measurement . 11
5 Measurement procedure . 12
5.1 Calibration of measurement equipment . 12
5.2 Detailed protocol of the measurement procedure . 12
6 Data analysis and interpretation of results . 12
6.1 General . 12
6.2 When the minimum conductance neutral point is clear . 12
6.3 When the minimum conductance neutral point is unclear . 13
7 Results to be reported . 13
7.1 Cover sheet . 13
7.2 Product or sample identification . 14
7.3 Measurement conditions . 14
7.4 Measurement specific information . 14
7.5 Measurement results . 14
Annex A (informative) Graphene FET . 15
A.1 Background. 15
A.2 Test report . 15
Annex B (informative) Graphene/hBN/MoS heterostructure memory FET . 16
2
B.1 Background. 16
B.2 Test report . 18
Annex C (informative) MoTe FET . 19
2
C.1 Background. 19
C.2 Test report . 20
Annex D (informative) WSe FET . 21
2
D.1 Background. 21
D.2 Test report . 22
Bibliography . 23

Figure 1 – Schematic of a back-gated graphene FET (inset: top view of the optical
microscopic image) . 10
Figure 2 – Experimental setup for measurements of electrical properties of FET device. 11

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IEC TS 62607-6-16:2022  IEC 2022 – 3 –
Figure 3 – Voltage shift obtained from transfer curves upon plasma doping with various
plasma treatments onto the graphene, using 300-nm-thick SiO back gate insulator . 13
2
Figure 4 – Voltage shift obtained from transfer curves of MoS FET . 13
2
Figure B.1 – Heterostructure FETs: (a) schematic view and circuit diagram of the
fabricated device; (b) optical microscopic photograph of GBM FET; (c) optical
microscopic photograph of MBG FET . 16
Figure B.2 – Voltage shift obtained from transfer curves of two types of memory device
upon charge injection . 17
Figure C.1 – Optical microscopic image of MoTe FET and the thickness of 2D MoTe
2 2

measured by AFM . 19
Figure C.2 – Voltage shift observed from transfer curves measured by using 2D
MoTe FET . 20
2
Figure D.1 –WSe FET . 21
2
Figure D.2 – Transfer curves of 2D WSe FET devices before and after doping with
2
contacts (inset: output curves of devices before and after doping) . 22

Table 1 – Specification of key control characteristics, 2D carrier concentration . 12
Table A.1 – 2D carrier concentration measured from graphene-FET for different
doping-inducing Ar plasma treatment times . 15
Table B.1 – Carrier concentration derived from the electrical characteristics of GBM
and MBG . 18

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– 4 – IEC TS 62607-6-16:2022  IEC 2022
INTERNATIONAL ELECTROTECHNICAL COMMISSION
____________

NANOMANUFACTURING –
KEY CONTROL CHARACTERISTICS –

Part 6-16: Two-dimensional materials –
Carrier concentration: Field effect transistor method

FOREWORD
1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising
all national electrotechnical committees (IEC National Committees). The object of IEC is to promote international
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8) Attention is drawn to the Normative references cited in this publication. Use of the referenced publications is
indispensable for the correct application of this publication.
9) Attention is drawn to the possibility that some of the elements of this IEC Publication may be the subject of patent
rights. IEC shall not be held responsible for identifying any or all such patent rights.
IEC TS 62607-6-16 has been prepared by IEC technical committee 113: Nanotechnology for
electrotechnical products and systems. It is a Technical Specification.
The text of this Technical Specification is based on the following documents:
Draft Report on voting
113/679/DTS 113/698/RVDTS

Full information on the voting for its approval can be found in the report on voting indicated in
the above table.
The language used for the development of this Technical Specification is English.

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IEC TS 62607-6-16:2022  IEC 2022 – 5 –
This document was drafted in accordance with ISO/IEC Directives, Part 2, and developed in
accordance with ISO/IEC Directives, Part 1 and ISO/IEC Directives, IEC Supplement, available
at www.iec.ch/members_experts/refdocs. The main document types developed by IEC are
described in greater detail at www.iec.ch/publications.
A list of all parts in the IEC TS 62607 series, published under the general title
Nanomanufacturing – Key control characteristics, can be found on the IEC website.
The committee has decided that the contents of this document will remain unchanged until the
stability date indicated on the IEC website under webstore.iec.ch in the data related to the
specific document. At this date, the document will be
• reconfirmed,
• withdrawn,
• replaced by a revised edition, or
• amended.

IMPORTANT – The "colour inside" logo on the cover page of this document indicates that it
contains colours which are considered to be useful for the correct understanding of its
contents. Users should therefore print this document using a colour printer.

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– 6 – IEC TS 62607-6-16:2022  IEC 2022
INTRODUCTION
Atomically thin 2D materials are expected to be used for future electrical sub-systems or
electronic device applications. For these applications, the materials need to be doped with
dopants to generate carriers. In contrast to 3D bulk materials, carrier concentrations in 2D
materials are difficult to measure directly due to their limited thickness.
– Different from conventional 3D bulk materials in which doping effect is induced from
activation of substitutional dopant atoms, the doping effect in 2D materials is mostly induced
by generation of free carriers, for example electrons by using plasma treatment, chemical
treatment, etc.
– In the 3D bulk materials, carrier concentration can be obtained by measuring concentration
of dopant atoms under the assumption that both concentrations are the same. Therefore, it
is possible to measure the doping concentration in 3D bulk materials using secondary ion
mass spectroscopy (SIMS), which measures the concentration of dopant atoms, and using
I-V or C-V characterization, which measures the concentration of free charge carriers such
1
as electrons and holes [1] .
– In contrast, in the 2D materials, carrier concentration needs to be measured for carriers
such as electrons and holes which are induced from external means such as plasma
treatment or chemical treatment.
For this reason, a standard method to determine the carrier concentration needs to be
established for 2D materials.

—————————
1
Numbers in square brackets refer to the Bibliography.

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IEC TS 62607-6-16:2022  IEC 2022 – 7 –
NANOMANUFACTURING –
KEY CONTROL CHARACTERISTICS –

Part 6-16: Two-dimensional materials –
Carrier concentration: Field effect transistor method



1 Scope
This part of IEC TS 62607 establishes a standardized method to determine the key control
characteristic
• carrier concentration
for semiconducting two-dimensional materials by the
• field effect transistor (FET) method.
For semiconducting two-dimensional materials, the carrier concentration is evaluated using a
field effect transistor (FET) test by a measurement of the voltage shift obtained from transfer
curve upon doping process. The FET test structure consists of three terminals of source, drain,
and gate where voltage is applied to induce the transistor action. Transfer curves are obtained
by measuring drain current while applying varied gate voltage and constant drain voltage with
respect to the source which is grounded.
• The method is applicable to semiconducting two-dimensional materials with a bandgap like
that in transition metal dichalcogenides (MoS , MoTe , WS , WSe , etc.) and black
2 2 2 2
phosphorous. Pristine graphene shows semi-metallic characteristics without bandgap, and
therefore this method is not applicable to pristine graphene. However, it can be used for
other graphenes with bandgap (for example, semiconducting graphene oxide).
• It is likely that the measurement results will help to qualify technologies if they are usable
for future electrical sub-systems or electronic device applications.
2 Normative references
The following documents are referred to in the text in such a way that some or all of their content
constitutes requirements of this document. For dated references, only the edition cited applies.
For undated references, the latest edition of the referenced document (including any
amendments) applies.
There are no normative references in this document.
3 Terms and definitions
For the purposes of this document, the following terms and definitions apply.
ISO and IEC maintain terminological databases for use in standardization at the following
addresses:
• IEC Electropedia: available at http://www.electropedia.org/
• ISO Online browsing platform: available at http://www.iso.org/obp

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– 8 – IEC TS 62607-6-16:2022  IEC 2022
3.1 General terms
3.1.1
key control characteristic
KCC
key performance indicator
material property or intermediate product characteristic which can affect safety or compliance
with regulations, fit, function, performance, quality, reliability or subsequent processing of the
final product
Note 1 to entry: The measurement of a key control characteristic is described in a standardized measurement
procedure with known accuracy and precision.
Note 2 to entry: It is possible to define more than one measurement method for a key control characteristic if the
correlation of the results is well-defined and known.
3.1.2
bilayer graphene
2LG
two-dimensional material consisting of two well-defined stacked graphene layers
Note 1 to entry: If the stacking registry is known, it can be specified separately, for example, as "Bernal stacked
bilayer graphene".
[SOURCE: ISO/TS 80004-13:2017 [2], 3.1.2.6]
3.1.3
few-layer graphene
FLG
two-dimensional material consisting of three to ten well-defined stacked graphene layers
[SOURCE: ISO/TS 80004-13:2017 [2], 3.1.2.10]
3.1.4
two-dimensional material
2D material
material, consisting of one or several layers with the atoms in each layer strongly bonded to
neighbouring atoms in the same layer, which has one dimension, its thickness, in the nanoscale
or smaller, and the other two dimensions generally at larger scales
Note 1 to entry: The number of layers when a two-dimensional material becomes a bulk material varies depending
on both the material being measured and its properties. In the case of graphene layers, it is a two-dimensional
material up to ten layers thick for electrical measurements, beyond which the electrical properties of the material are
not distinct from those for the bulk (also known as graphite).
Note 2 to entry: Interlayer bonding is distinct from and weaker than intralayer bonding.
Note 3 to entry: Each layer may contain more than one element.
Note 4 to entry: A two-dimensional material can be a nanoplate.
[SOURCE ISO/TS 80004-13:2017 [2], 3.1.1.1]
3.2 Key control characteristics measured in accordance with this document
3.2.1
2D carrier concentration
characteristic described by the areal density of electrons or holes free to move in two
dimensions due to the atomical thinness of 2D materials that restricts the movement of the
carriers in the third direction
-2
Note 1 to entry: The unit of 2D carrier concentration is [cm ]

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IEC TS 62607-6-16:2022  IEC 2022 – 9 –
Note 2 to entry: In general, increased doping leads to increased conductivity due to the higher concentration of the
charge carriers. Carrier density in conventional semiconductors is usually tuned with substitutional doping. However,
substitutional doping is very difficult in 2D materials due to their nanometre-scale thickness. Generally, in
conventional semiconductors, the doping concentration at room temperature is assumed to be the same as the free
carrier concentration because free carriers such as electrons or holes are generated from fully ionized dopant atoms.
Therefore, doping concentration in bulk semiconductors can be estimated by various methods, e.g. SIMS, X-ray
photoelectron spectroscopy (XPS), and I−V (C−V) characterization. By contrast, doping in 2D materials is induced
mainly by electrostatic gating or charge transfer and therefore doping concentration in 2D materials needs to be
determined by electrical characterization. [3]
3.3 Terms related to the measurement method
3.3.1
field effect transistor
FET
transistor in which the voltage on one terminal (gate) creates a field that allows or disallows
conduction between the other two terminals (source and drain)
Note 1 to entry: The carrier concentration of a semiconductor can be modulated by electrostatic gating in an FET
configuration. In the FET, two metal electrodes (source and drain, S/D) formed on the sample are used to provide
driving force for the lateral current conduction, while the third electrode (gate, G) is used to modulate the current
conduction on the sample surface across a gate dielectric material.
3.3.2
transfer curve
graph that provides corresponding output current values for each possible voltage input to an
electronic or control system component
Note 1 to entry: Transfer curves are obtained by measuring drain current (I ) as a function of gate voltage (V ) at
D G
constant drain voltage (V ).
D
3.3.3
charge neutral point
point at which the electron current is equal to hole current in semiconductors
4 General
4.1 Measurement principle
Doping concentration, which is equivalent to free carrier concentration, can be determined by
shift of charge neutral point in transfer curves (drain current as a function of gate voltage). This
method requires to use a transistor, more specifically a FET, and works well for semiconducting
materials.
4.2 Sample preparation method
4.2.1 Sample preparation
2D materials, which are obtained mostly through micromechanical exfoliation or chemical
vapour deposition, are typically deposited on Si substrates covered with thermally grown SiO
2
film. Raman spectroscopy and XPS can be performed to identify their chemical components
and to analyse defects. Heterostructure is prepared by stacking 2D materials.
4.2.2 Fabrication of FET
A typical example for substrates to be used for 2D materials is
• silica on silicon (SiO on Si).
2
The bottom gate electrode can consist of
• highly doped Si substrate wafers used for electrical back gating, underneath the SiO .
2

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– 10 – IEC TS 62607-6-16:2022  IEC 2022
The bottom gate-dielectric layer can consist of
• typical values of 90 nm and 285 nm thick SiO layer.
2
The semiconducting layer can consist of
• 2D materials, e.g. graphene, MoS , MoTe , WSe , WS , black phosphorus.
2 2 2 2
The top source and drain electrode materials can consist of
• stable metals with low resistivity, e.g. Au, Ag, and adhesion metals, e.g. Ti, Cr, with the total
thickness of metal electrodes in the range of 5 nm to 50 nm.
The channel length between source and drain electrodes distance is
• the distance between source and drain typically in the range of 100 nm to 10 μm, with the
patterning process of the electrodes that can be done by optical lithography or electron-
beam lithography.
The encapsulation of the sample can be adopted for the following reason.
• 2D materials carrier concentration can be affected by the surface conditions. But the
encapsulation effect is not quantified and the encapsulation procedures are not considered
in this document.
The fabricated sample's baseline condition for electrically working before the measurement.
• It is recommended to maintain gate leakage current measured from tested devices less than
−10
10 A.

SOURCE: Reproduced from Y. Lim et al. (2012) [4], with the permission of American Chemical Society.
Figure 1 – Schematic of a back-gated graphene FET
(inset: top view of the optical microscopic image)
4.3 Description of measurement equipment
Electrical properties of fabricated FET devices are measured with a semiconductor parameter
analyser, as shown in Figure 2 b). The vacuum probe station (Figure 2 a)) is used to obtain
more accurate results with minimal effects of surface contamination.

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IEC TS 62607-6-16:2022  IEC 2022 – 11 –

b) Semiconductor parameter

analyser
a) Vacuum probe station
Key
1 Vacuum chamber
2 Probe position manipulator
3 CCD camera
4 Light bank of CCD
5 Computer
6 Liquid N cylinder
2
7 Machine grounding
8 Human grounding bracelet
9 Anti-vibration table

c) Temperature controller
Figure 2 – Experimental setup for measurements
of electrical properties of FET device
The analyser typically is connected to a probe station, as shown in Figure 2. For more detailed
measurements of electrical properties, a temperature-dependent test can be performed. For
example, the temperature inside the probe station is controlled by a heater for heating and
liquid N source for cooling. Before electrical measurements, the equipment, the device under
2
test, and any electrically conducting media such as tweezer and human-being shall be properly
grounded to avoid the damage on sample due to the electrostatic discharge. The schematic of
graphene FET device under test and the top view of the sample are as in Figure 1.
4.4 Ambient conditions during measurement
The device under test shall be placed and probed inside a vacuum chamber as shown in
Figure 2 a). Because 2D materials are air and moisture sensitive, the measurement can be
performed in the vacuum chamber with a controlled pressure level. The measurement is carried
out after the pressure of the chamber is lowered below 4 Pa, which is equivalent to about
30 mTorr.

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– 12 – IEC TS 62607-6-16:2022  IEC 2022
5 Measurement procedure
5.1 Calibration of measurement equipment
Calibration and adjustments shall be performed periodically so that the instruments satisfy the
measurement specifications. For typical semiconductor parameter analysers, it is
recommended to perform the calibration once a year.
5.2 Detailed protocol of the measurement procedure
The carrier concentration measurement of the 2D materials needs to be conducted in the
following procedure.
1) When preparing the measurement by using a probe station, make sure that three probes
are electrically contacted to the three terminals (source, drain, and gate
...