Components for low-voltage surge protection -Part 341: Performance requirements and test circuits for thyristor surge suppressors (TSS)

This part of IEC 61643 specifies standard test circuits and methods for thyristor surge
suppressor (TSS) components. These surge protective components, SPCs, are specially
formulated thyristors designed to limit overvoltages and divert surge currents by clamping and
switching actions. These SPCs are used in the construction of surge protective devices
(SPDs) and equipment used in Information & Communications Technologies (ICT) networks
with voltages up to AC 1 000 V and DC 1 500 V. This document is applicable to gated or nongated
TSS components with third quadrant (-v and –i) characteristics of blocking, conducting
or switching.
This document contains information on
• terminology;
• letter symbols;
• essential ratings and characteristics;
• rating verification and characteristic measurement;
This document does not apply to the conventional three-terminal thyristors as covered by
IEC 60747-6.

Bauelemente für Überspannungsschutzgeräte für Niederspannung - Teil 341: Leistungsanforderungen sowie Prüfschaltungen für Suppressordioden (TSS)

Composants pour parafoudres basse tension - Partie 341: Exigences de performance et circuits d'essai pour parafoudres à thyristor (TSS)

IEC 61643-341:2020 spécifie les circuits d'essai et les méthodes normalisés pour les composants de parafoudre à thyristor (TSS, Thyristor Surge Suppressor). Ces composants de protection contre les surtensions (SPC, Surge Protective Components) sont des thyristors spécialement conçus pour limiter les surtensions et écouler les courants de surcharge par des actions d'écrêtage et de commutation. Ces SPC sont utilisés dans la construction de parafoudres (SPD, Surge Protective Devices) et d'équipements utilisés dans les réseaux de technologies de l'information et de la communication (TIC) dont les tensions atteignent 1 000 V CA et 1 500 V CC. Le présent document s'applique aux composants TSS à gâchette ou non, équipés d'un troisième quadrant (-v et –i) ayant des caractéristiques de blocage, de conduction ou de commutation. Le présent document contient des indications sur: - la terminologie; - les symboles littéraux; - les valeurs assignées et les caractéristiques essentielles; - la vérification des valeurs assignées et la mesure des caractéristiques. Le présent document ne s'applique pas aux thyristors conventionnels à trois bornes couverts dans l'IEC 60747-6. Cette deuxième édition de l'IEC 61643-341 annule et remplace la première édition parue en 2001. Cette édition constitue une révision technique. Cette édition inclut la modification technique majeure suivante par rapport à l'édition précédente: Ajout de valeurs de performances.

Sestavni deli za nizkonapetostne naprave za zaščito pred prenapetostnimi udari - 341. del: Specifikacije za tiristorske prenapetostne omejevalnike (TSS)

General Information

Status
Published
Publication Date
02-Sep-2020
Technical Committee
Current Stage
6060 - National Implementation/Publication (Adopted Project)
Start Date
31-Jul-2020
Due Date
05-Oct-2020
Completion Date
03-Sep-2020

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SLOVENSKI STANDARD
SIST EN IEC 61643-341:2020
01-oktober-2020
Nadomešča:
SIST EN 61643-341:2005
Sestavni deli za nizkonapetostne naprave za zaščito pred prenapetostnimi udari -
341. del: Specifikacije za tiristorske prenapetostne omejevalnike (TSS)

Components for low-voltage surge protection -Part 341: Performance requirements and

test circuits for thyristor surge suppressors (TSS)
Ta slovenski standard je istoveten z: EN IEC 61643-341:2020
ICS:
29.120.50 Varovalke in druga Fuses and other overcurrent
nadtokovna zaščita protection devices
31.080.10 Diode Diodes
SIST EN IEC 61643-341:2020 en

2003-01.Slovenski inštitut za standardizacijo. Razmnoževanje celote ali delov tega standarda ni dovoljeno.

---------------------- Page: 1 ----------------------
SIST EN IEC 61643-341:2020
---------------------- Page: 2 ----------------------
SIST EN IEC 61643-341:2020
EUROPEAN STANDARD EN IEC 61643-341
NORME EUROPÉENNE
EUROPÄISCHE NORM
July 2020
ICS 31.080.10 Supersedes EN 61643-341:2001 and all of its
amendments and corrigenda (if any)
English Version
Components for low-voltage surge protection - Part 341:
Performance requirements and test circuits for thyristor surge
suppressors (TSS)
(IEC 61643-341:2020)

Composants pour parafoudres basse tension - Partie 341: Bauelemente für Überspannungsschutzgeräte für

Exigences de performance et circuits d'essai pour Niederspannung - Teil 341: Leistungsanforderungen sowie

parafoudres à thyristor (TSS) Prüfschaltungen für Suppressordioden (TSS)
(IEC 61643-341:2020) (IEC 61643-341:2020)

This European Standard was approved by CENELEC on 2020-06-17. CENELEC members are bound to comply with the CEN/CENELEC

Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration.

Up-to-date lists and bibliographical references concerning such national standards may be obtained on application to the CEN-CENELEC

Management Centre or to any CENELEC member.

This European Standard exists in three official versions (English, French, German). A version in any other language made by translation

under the responsibility of a CENELEC member into its own language and notified to the CEN-CENELEC Management Centre has the

same status as the official versions.

CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic,

Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, the

Netherlands, Norway, Poland, Portugal, Republic of North Macedonia, Romania, Serbia, Slovakia, Slovenia, Spain, Sweden, Switzerland,

Turkey and the United Kingdom.
European Committee for Electrotechnical Standardization
Comité Européen de Normalisation Electrotechnique
Europäisches Komitee für Elektrotechnische Normung
CEN-CENELEC Management Centre: Rue de la Science 23, B-1040 Brussels

© 2020 CENELEC All rights of exploitation in any form and by any means reserved worldwide for CENELEC Members.

Ref. No. EN IEC 61643-341:2020 E
---------------------- Page: 3 ----------------------
SIST EN IEC 61643-341:2020
EN IEC 61643-341:2020 (E)
European foreword

The text of document 37B/218/FDIS, future edition 2 of IEC 61643-341, prepared by SC 37B

"Components for low-voltage surge protection" of IEC/TC 37 "Surge arresters" was submitted to the

IEC-CENELEC parallel vote and approved by CENELEC as EN IEC 61643-341:2020.
The following dates are fixed:

• latest date by which the document has to be implemented at national (dop) 2021-03-17

level by publication of an identical national standard or by endorsement

• latest date by which the national standards conflicting with the (dow) 2023-06-17

document have to be withdrawn

This document supersedes EN 61643-341:2001 and all of its amendments and corrigenda (if any).

Attention is drawn to the possibility that some of the elements of this document may be the subject of

patent rights. CENELEC shall not be held responsible for identifying any or all such patent rights.

Endorsement notice

The text of the International Standard IEC 61643-341:2020 was approved by CENELEC as a

European Standard without any modification.

In the official version, for Bibliography, the following notes have to be added for the standards

indicated:
IEC 60060-1:2010 NOTE Harmonized as EN 60060-1:2010 (not modified)
IEC 60068-2-20:2008 NOTE Harmonized as EN 60068-2-20:2008 (not modified)
IEC 60068-2-21:2006 NOTE Harmonized as EN 60068-2-21:2006 (not modified)
IEC 60099-4:2014 NOTE Harmonized as EN 60099-4:2014 (not modified)
IEC 60721-3-3:2019 NOTE Harmonized as EN IEC 60721-3-3:2019 (not modified)
IEC 60721-3-9:1993 NOTE Harmonized as EN 60721-3-9:1993 (not modified)
IEC 60749-1:2002 NOTE Harmonized as EN 60749-1:2003 (not modified)
IEC 60950-1:2005 NOTE Harmonized as EN 60950-1:2006 (modified)
IEC 61000-4-5:2014 NOTE Harmonized as EN 61000-4-5:2014 (not modified)
IEC 61643-11:2011 NOTE Harmonized as EN 61643-11:2012 (modified)
IEC 62475:2010 NOTE Harmonized as EN 62475:2010 (not modified)
---------------------- Page: 4 ----------------------
SIST EN IEC 61643-341:2020
EN IEC 61643-341:2020 (E)
Annex ZA
(normative)
Normative references to international publications
with their corresponding European publications

The following documents are referred to in the text in such a way that some or all of their content

constitutes requirements of this document. For dated references, only the edition cited applies. For

undated references, the latest edition of the referenced document (including any amendments)

applies.

NOTE 1 Where an International Publication has been modified by common modifications, indicated by (mod), the relevant

EN/HD applies.

NOTE 2 Up-to-date information on the latest versions of the European Standards listed in this annex is available here:

www.cenelec.eu.
Publication Year Title EN/HD Year
IEC 60050-521 - International Electrotechnical Vocabulary - - -
Part 521: Semiconductor devices and
integrated circuits

IEC 60068-2-20 2008 Environmental testing - Part 2-20: Tests - EN 60068-2-20 2008

Test T: Test methods for solderability and
resistance to soldering heat of devices with
leads
---------------------- Page: 5 ----------------------
SIST EN IEC 61643-341:2020
---------------------- Page: 6 ----------------------
SIST EN IEC 61643-341:2020
IEC 61643-341
Edition 2.0 2020-05
INTERNATIONAL
STANDARD
NORME
INTERNATIONALE
Components for low-voltage surge protection –
Part 341: Performance requirements and test circuits for thyristor surge
suppressors (TSS)
Composants pour parafoudres basse tension –
Partie 341: Exigences de performance et circuits d'essai pour parafoudres
à thyristor (TSS)
INTERNATIONAL
ELECTROTECHNICAL
COMMISSION
COMMISSION
ELECTROTECHNIQUE
INTERNATIONALE
ICS 31.080.10 ISBN 978-2-8322-8304-2

Warning! Make sure that you obtained this publication from an authorized distributor.

Attention! Veuillez vous assurer que vous avez obtenu cette publication via un distributeur agréé.

® Registered trademark of the International Electrotechnical Commission
Marque déposée de la Commission Electrotechnique Internationale
---------------------- Page: 7 ----------------------
SIST EN IEC 61643-341:2020
– 2 – IEC 61643-341:2020 © IEC 2020
CONTENTS

FOREWORD ........................................................................................................................... 6

1 Scope .............................................................................................................................. 8

2 Normative references ...................................................................................................... 8

3 Terms, definitions, abbreviated terms and symbols .......................................................... 8

3.1 Parametric terms, letter symbols and definitions ..................................................... 9

3.2 General terms ......................................................................................................... 9

3.3 Main terminal ratings .............................................................................................. 9

3.4 Main terminal characteristics ................................................................................. 11

3.5 Additional and derived parameters ........................................................................ 12

3.6 Temperature related parameters ........................................................................... 12

3.7 Gate terminal parameters ..................................................................................... 13

3.8 Abbreviated terms ................................................................................................. 15

3.9 Circuit symbols ..................................................................................................... 15

4 TSS types ...................................................................................................................... 16

5 Service conditions ......................................................................................................... 18

5.1 Normal service conditions ..................................................................................... 18

5.2 Storage temperature range, T min to T max. .................................................. 18

stg stg

6 Mechanical requirements and identification ................................................................... 18

6.1 Robustness of terminations ................................................................................... 18

6.2 Solderability .......................................................................................................... 18

6.3 Marking ................................................................................................................. 18

6.4 Documentation ...................................................................................................... 18

7 Standard test methods ................................................................................................... 19

7.1 Failure rates ......................................................................................................... 19

7.2 Test conditions ..................................................................................................... 19

7.2.1 General........................................................................................................ 19

7.2.2 Standard atmospheric conditions ................................................................. 19

7.2.3 Measurement errors ..................................................................................... 20

7.2.4 Measurement accuracy ................................................................................ 20

7.2.5 Designated impulse shape and values ......................................................... 20

7.2.6 Multiple TSS ................................................................................................ 20

7.2.7 Gated TSS testing ....................................................................................... 20

7.3 Rating test procedures .......................................................................................... 20

7.3.1 General........................................................................................................ 20

7.3.2 Repetitive peak off-state voltage, V ...................................................... 21

DRM

7.3.3 Repetitive peak on-state current, I ........................................................ 21

TRM

7.3.4 Non-repetitive peak on-state current, I .................................................. 22

TSM

7.3.5 Non-repetitive peak pulse current, I ......................................................... 23

7.3.6 Repetitive peak reverse voltage, V ....................................................... 24

RRM

7.3.7 Non-repetitive surge forward current, I .................................................. 24

FSM

7.3.8 Repetitive peak forward current, I ......................................................... 24

FRM

7.3.9 Critical rate of rise of on-state current, di/dt ................................................. 25

7.4 Characteristic test procedures .............................................................................. 26

7.4.1 General........................................................................................................ 26

7.4.2 Off-state current, I ..................................................................................... 26

7.4.3 Repetitive peak off-state current, I ....................................................... 27

DRM
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SIST EN IEC 61643-341:2020
IEC 61643-341:2020 © IEC 2020 – 3 –

7.4.4 Repetitive peak reverse current, I ........................................................ 27

RRM

7.4.5 Breakover voltage, V and current, I ............................................... 27

(BO) (BO)

7.4.6 On-state voltage, V .................................................................................... 29

7.4.7 Holding current, I ...................................................................................... 33

7.4.8 Off-state capacitance, C ............................................................................. 34

7.4.9 Forward voltage, V ..................................................................................... 37

7.4.10 Peak forward recovery voltage, V ......................................................... 37

FRM

7.4.11 Critical rate of off-state voltage rise, dv/dt .................................................... 38

7.4.12 Variation of holding current with temperature ............................................... 38

7.4.13 Gate-to-adjacent terminal peak off-state voltage and peak off-state

gate current, V , I .......................................................................... 38

GDM GDM

7.4.14 Gate reverse current, adjacent terminal open, I , I ......................... 39

GAO GKO

7.4.15 Gate reverse current, main terminals short-circuited, I , I ............... 40

GAS GKS

Annex A (informative) Common impulse waveshapes .......................................................... 41

A.1 General ................................................................................................................. 41

A.2 Types of impulse generator ................................................................................... 41

A.3 Impulse generator parameters .............................................................................. 41

A.3.1 Glossary of terms......................................................................................... 41

A.3.2 Virtual parameters ....................................................................................... 42

A.4 Impulse generators typically used for surge protector testing ................................ 44

A.4.1 General........................................................................................................ 44

A.4.2 Impulse generators with a defined voltage waveform ................................... 44

A.4.3 Impulse generators with a defined current waveform .................................... 44

A.4.4 Generators with defined voltage and current waveforms .............................. 45

Annex B (informative) Glossary of IEC 60747-6 [10] thyristor terms ..................................... 48

B.1 General ................................................................................................................. 48

B.2 Thyristor types ...................................................................................................... 48

B.3 Basic terms defining the static voltage-current characteristics of triode

thyristors ............................................................................................................... 49

B.4 Basic terms defining the static voltage-current characteristics of diode

thyristors ............................................................................................................... 51

B.5 Particulars of the static voltage-current characteristics of triode and diode

thyristors ............................................................................................................... 52

B.6 Terms related to ratings and characteristics; principal voltages ............................. 54

B.7 Terms related to ratings and characteristics; principal currents ............................. 55

B.8 Terms related to ratings and characteristics; gate voltages and currents ............... 57

B.9 Terms related to ratings and characteristics; powers, energies and losses ............ 59

B.10 Letter symbols ...................................................................................................... 61

B.10.1 General........................................................................................................ 61

B.10.2 List of letter symbols .................................................................................... 62

Annex C (informative) Additional parametric tests ................................................................ 64

C.1 General ................................................................................................................. 64

C.2 Temperature derating............................................................................................ 64

C.3 Thermal resistance, R ........................................................................................ 64

C.4 Transient thermal impedance, Z (t) ...................................................................... 65

C.5 Gate reverse current, on-state, I , I .......................................................... 66

GAT GKT

C.6 Gate reverse current, forward conducting state, I , I ................................ 67

GAF GKF

C.7 Gate switching charge, Q ................................................................................. 68

C.8 Peak gate switching current, I ....................................................................... 70

GSM
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SIST EN IEC 61643-341:2020
– 4 – IEC 61643-341:2020 © IEC 2020

C.9 Gate-to-adjacent terminal breakover voltage, V , V ........................ 71

GK(BO) GA(BO)

Annex D (normative) Preferred values ................................................................................. 72

D.1 General ................................................................................................................. 72

D.2 V and V .................................................................................................. 72

(BO) DRM

D.3 C , V and I ............................................................................................... 73

O DRM PP

D.4 I ......................................................................................................................... 74

D.5 I and time to half value (duration) ..................................................................... 74

Bibliography .......................................................................................................................... 75

Figure 1 – Fixed voltage, two terminals: a) reverse blocking and b) reverse conducting ........ 15

Figure 2 – Gated reverse blocking: a) P gate b) N gate and c) P & N gate ............................ 16

Figure 3 – Gated reverse conducting: a) P gate and b) N gate .............................................. 16

Figure 4 – Bidirectional: a) 2 terminal fixed voltage and b) gated .......................................... 16

Figure 5 – Switching quadrant characteristics: a) fixed-voltage TSS and b) gated TSS ......... 17

Figure 6 – TSS non-switching characteristics: a) reverse blocking b) reverse

conducting ............................................................................................................................ 17

Figure 7 – Test circuit for verifying repetitive peak off-state voltage (V ) ......................... 21

DRM

Figure 8 – Test circuit for verifying repetitive peak on-state current, I ............................ 21

TRM

Figure 9 – Repetitive peak on-state current waveforms ......................................................... 22

Figure 10 – Test circuit for verifying non-repetitive peak on-state current, I ................... 23

TSM

Figure 11 – Test circuit for verifying non-repetitive peak pulse current, I .......................... 24

Figure 12 – Test circuit for verifying critical rate of rise of on-state current (di/dt) ................. 25

Figure 13 – Half sine-wave di/dt test circuit .......................................................................... 26

Figure 14 – Test circuit for off-state current, I at V ........................................................... 27

D D

Figure 15 – Test circuit for breakover, V and I and on-state voltage, V ................. 28

(BO) (BO) T
Figure 16 – Voltage and current waveforms versus time for a fixed-voltage TSS

showing switch-on, on-state and switch-off events ................................................................ 28

Figure 17 – Waveform expansions of Figure 16 .................................................................... 30

Figure 18 – Voltage and current waveforms versus time for a gated TSS showing

switch-on, on-state and switch-off events .............................................................................. 31

Figure 19 – Waveform expansions of Figure 18 .................................................................... 32

Figure 20 – Test circuit for holding current, I ...................................................................... 33

Figure 21 – Test circuit for holding current with additional DC bias ....................................... 34

Figure 22 – Test circuit for capacitance measurement .......................................................... 34

Figure 23 – Test circuit for capacitance measurement with external DC bias ........................ 35

Figure 24 – Test circuit for capacitance measurement of multi-terminal TSS ......................... 36

Figure 25 – Diode voltage and current waveforms versus time showing V and
FRM

rising current di/dt ................................................................................................................. 37

Figure 26 – Test circuit for exponential critical rate of off-state voltage rise, dv/dt ................. 38

Figure 27 – Test circuit for gate-to-adjacent terminal peak off-state voltage and

current, V and I ..................................................................................................... 39

GDM GDM

Figure 28 – Test circuit for gate reverse current, adjacent terminal open, I , I ......... 39

GAO GKO

Figure 29 – Test circuit for gate reverse current, main terminals short-circuited, I ,

GAS

I .................................................................................................................................... 40

GKS
Figure A.1 – Current or voltage impulse amplitude versus time showing a 10 % to

90 % T front time and T time to half value ......................................................................... 43

1 2
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SIST EN IEC 61643-341:2020
IEC 61643-341:2020 © IEC 2020 – 5 –

Figure A.2 – Voltage impulse amplitude versus time showing a 30 % to 90 % T front

time and T time to half value ............................................................................................... 43

Figure B.1 – Particulars of the static characteristic of unidirectional thyristors....................... 52

Figure B.2 – Particulars of the static characteristic of bidirectional thyristors ........................ 53

Figure B.3 – a) Approximation of the on-state V -I characteristic b) Approximation of

T T

the reverse V -I characteristic ........................................................................................... 60

R R

Figure C.1 – Test circuit for thermal resistance and impedance ............................................ 65

Figure C.2 – Thermal impedance versus time ....................................................................... 66

Figure C.3 – Test circuit for gate reverse current, on-state, I , I ............................... 67

GAT GKT

Figure C.4 – Test circuit for gate reverse current, forward conducting state, I ,

GAF

I ..................................................................................................................................... 68

GKF

Figure C.5 – Test circuit for gate switching current, gate switching charge and gate-to-

adjacent terminal breakover voltage, I , Q , V , V ................................. 69

GSM GS GK(BO) GA(BO)

Figure C.6 – Test circuit of an integrated gate diode TSS for gate switching current,

gate switching charge and gate-to-adjacent terminal breakover voltage I , Q ,
GSM GS

V , V .............................................................................................................. 70

GK(BO) GA(BO)
Figure C.7 – Overall and expanded clamping waveforms for a P-type gate TSS

showing V and Q measurement (di /dt = 10 A/µs, V = –72 V) ......................... 71

GK(BO) GS K GG

Figure D.1 – V /V ratio against V ...................................................................... 72

(BO) DRM DRM

Figure D.2 – V vs V ................................................................................................ 73

(BO) DRM

Figure D.3 – Capacitance variation with DC bias ................................................................... 73

Figure D.4 – I versus Duration for various 10/1 000 current ratings .................................. 74

Table 1 – Types of TSS ........................................................................................................ 17

Table 2 – Breakover ramp rate test values ............................................................................ 29

Table A.1 – Voltage impulse generators ................................................................................ 44

Table A.2 – Current impulse generators ................................................................................ 45

Table A.3 – Voltage and current impulse generators ............................................................. 46

Table A.4 – Other voltage and current impulse generators .................................................... 47

Table B.1 – Additional general subscripts ............................................................................. 61

Table B.2 – Principal voltages, anode-cathode voltages........................................................ 62

Table B.3 – Principal currents, anode currents, cathode currents .......................................... 62

Table B.4 – Gate voltages ..................................................................................................... 63

Table B.5 – Gate currents ..................................................................................................... 63

Table B.6 – Sundry quantities ............................................................................................... 63

Table B.7 – Power loss ......................................................................................................... 63

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SIST EN IEC 61643-341:2020
– 6 – IEC 61643-341:2020 © IEC 2020
INTERNATIONAL ELECTROTECHNICAL COMMISSION
___________
COMPONENTS FOR LOW-VOLTAGE SURGE PROTECTION –
Part 341: Performance requirements and test circuits
for thyristor surge suppressors (TSS)
FOREWORD

1) The International Electrotechnical Commission (IEC) is a worldwide organization for standardization comprising

all national electrotechnical committees (IEC National Committees). The object of IEC is to promote

international co-operation on all questions concerning standardization in the electrical and electronic fields. To

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agreement between the two organizations.

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consensus of opinion on the relevant subjects since each technical committee has representation from all

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misinterpretation by any end user.
4) In order to promote international uniformity, IEC National Committees underta
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